Question
The output characteristics of a transistor in common-emitter configuration can be regarded as straight lines connecting the following points
IB = 20 µA 50 µA 80 µA
VCE(V) 1.0 8.0 1.0 8.0 1.0 8.0
IC (mA) 1.2 1.4 3.4 4.2 6.1 8.1
Plot the characteristics and superimpose the load line for a 1 kΩ load, given that the supply voltage is 9V and the d.c. base bias is 50 μA. The signal input resistance is 800 Ω. When a peak input current of 30 μA varies sinusoidally about a mean bias of 50 μA, determine
(a) The quiescent collector current
(b) The current gain
(c) The voltage gain
(d) The power gain
From Common Emitter configuration, we can develop the load line analysis equation as follows
9 - Ic * 1 - VCE = 0
VCE = 9 - Ic * 1 ................................Equation(1)
We will plot equation(1) with the output characteristics of the transistor as shown in the image attached below.
(a) From graph we see that quiescent Ic = 4.2 mA
(b) Current gain "\\beta" = "\\dfrac{}{}" "\\dfrac{Ic}{I_B}" = "\\dfrac{4.2 \\ mA}{30\\ \\ uA}" = 140
(c) Voltage gain AV = "\\beta\\ *\\ \\dfrac{Output\\ resistance}{Input\\ Resistance}" = 140 * "\\dfrac{1000}{800}" = 175
(d) Power gain = Av * "\\beta" = 140 * 175 = 24500
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