Answer to Question #131847 in Assembler for Suchi

Question

A computer has 4 GB RAM with each memory word of 64 bits. It has cache memory having
1024 blocks having a size of 128 bits (2 memory words). Show how the main memory
address (C1AAF0AB)h will be mapped to cache address, if
(i) Direct cache mapping is used
(ii) Associative cache mapping is used
8
(iii)Two way set associative cache mapping is used.
You should show the size of tag, index, main memory block address and offset in your
answer

Answer 1

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