Answer to Question #164195 in Assembler for Vasu

Question

Draw and explain the interfacing of 256x8 ROM with 8085

Answer 1

8085 has 16 address lines (A0 - A15), hence a maximum of 64 KB (= 2^16 bytes) of memory locations can be interfaced with it.

Thus, we can say that 8085 can support a memory chip of size up to 64 kB. We can interface a memory chip of size less than that too. Also, we can interface several memory chips to a single 8085 microprocessor, until and unless their combined size does not exceed 64 kB.

ROM (Read Only Memory). ROM is of two types:

   EPROM (Erasable Programmable Read-Only Memory): The contents of an EPROM are erased by UV rays. Data is written on it optically.

   EEPROM (Electronically Erasable Programmable Read-Only Memory).

   Data pins: Since each memory location stores eight bits, there are eight data lines D0-D7 connected to the memory chip.

   Address pins: The number of address pins depends on the size of the memory. In case, a memory of size 256Bx8 have 2^8 different memory locations. Hence, it will have eight address lines A0 to A7. The first eight lines of the address bus of 8085 will be connected to the corresponding lines of 256B EPROM. The remaining address lines will be used to generate the chip select (CS) signal.

   CS pin: When this pin is enabled, the memory chip knows that the microprocessor is talking to it and responds to it accordingly. We need to generate this signal for the chip according to the range of addresses assigned to them. Basically, we select a chip only when it is needed. The Chip Select (CS) pin is used for this.

   OE pin: When this active-low output enable pin is enabled, the memory chip can output the data into the data bus.